Industrial Cameras, Industrial Imaging and Machine Vision - Wholesale Distributor - Aegis Electronic Group

 

Bitflow CTN-PC2-CXP4 Cyton Quad Channel CoaXPress frame grabber

BitFlow CYT-PC2-CXP4 Cyton Quad Channel CoaXPress Frame Grabber

BitFlow AXN-PC2-CL-1xE Image 1

BitFlow AXN-PC2-CL-1xE (AXNPC2CL1xE) Camera Link Frame Grabber

BitFlow CYT-PC2-CXP2 (CYTPC2CXP2) Cyton Dual Channel CoaXPress Frame Grabber

SKU
CYT-PC2-CXP2

The Cyton-CXP is based on BitFlow's brand new PCIe Gen 2.0 platform. To develop the Cyton platform, we first started with a clean slate, and asked ourselves, "what does a next generation frame grabber need?" For sure, it needs a Gen 2.0 PCIe x8 back end for the ultimate high speed access to host memory. It also needs a sophisticated DMA engine to handle the demands of new camera interface standards. New standards demand flexibility. 


Features:
The Virtual Frame Grabber

The Cyton-CXP4 can be configured in many different ways. It can acquire from one quad CXP-6 camera (total data rate: 25 Gb/S) , or four single link CXP-6 cameras, or anything in between. When acquiring from multiple cameras, each camera is attached to its own virtual frame grabber. This allows independent acquisition and control of each camera.However, when a four link camera is attached, only one virtual frame grabber is needed.

StreamSync
The StreamSync system consists of an Acquisition Engine and a Buffer Manager. The StreamSync system was first released on the Cyton-CXP and is a departure from previous BitFlow frame grabbers. The StreamSync system is a start-from-scratch complete redesign of the acquisition and DMA parts of a frame grabber. BitFlow used it years of experience in this area to design a next generation, super efficient capture system.

StreamSync Features:

  • Efficient support for variable sized images with fast context switches between frames
  • Per frame control of acquisition properties (AOI specifically)
  • Hardware control of image sequencing
  • Enhanced debug capabilities
  • Efficient support for on-demand buffer allocation (Genicam model)
  • Gracefully recovery from dropped packets (either on the input side or the DMA side)

CoaXPress High Speed Uplink
The Cyton-CXP has an optional fifth CXP connector that can run the full 6.25 Gb/S from the frame grabber to the camera. The CoaXPress standard is still evolving, but the need for this high speed uplink has already become apparent. The demands for bulk uploads to the camera, and precise trigger accuracy have already outstripped the current 20 Mb/S uplink specification. The Cyton-CXP is fully ready when the new CXP standard is released that defines when and how this uplink will be used.

PCI Express Gen 2.0 Interface
The Cyton-CXP has a Gen 2.0 x8 PCI Express bus interface. The Gen 2.0 PCIe bus doubles the data rate of the Gen 1.0 bus while using the same footprint and connectors. The Cyton-CXP is fully backwards compatible with Gen 1.0 motherboards, though the data rate will be halved. However, Gen 2.0 motherboards have been shipping for a few years and will be the norm on almost all motherboards looking forward. The board will work in any slot that it fits in. This means not only x16 and x8 slots, but also, as is becoming the trend, x4 and x1 slots that use x16 connectors. Performance will be degraded in x1 and x4 slots, but the board will work fine in applications that don't require maximum data rate.

Camera Control and I/O
The Cyton-CXP can acquire fixed or variable size images and features a programmable ROI (Region Of Interest) sub-windowing capability. The Cyton-CXP fully supports the CoaXPress 1.1 specification, which provides a high priority trigger packet from the frame grabber to the camera (note: both 1.1 and 1.0 cameras are supported, but the GPOI packet part of the 1.0 specification is not). All I/O signals can be routed to/from many internal and external destinations, the flexibility of the routing is unprecedented in the industry. In addition, there are separate hardware I/O signals which can be connected to/from external source. Finally each CXP camera has a fully set of these signals which can be run independently. The Cyton-CXP board, as with our past interface products, supports not only simple triggering modes but also complicated, application-specific triggering and control interactions with your hardware environment.

Application Support
Adding the Cyton-CXP to your application is simple with our SDK, which supports both 32-bit and 64-bit operating systems. Applications can be developed using C/C++/.NET and our sophisticated buffer management APIs. In addition, free drivers can be download from our web site for most 3rd party machine vision packages. The Cyton models are software compatible with each other, as well as with all the other current BitFlow frame grabbers. This makes migrating applications from Camera Link or analog to CXP simple and quick.

Features:

  • Half-Size x8 PCI Gen 2.0 Express Board
  • CoaXPress 1.0 compliant
  • Supports one to four CXP-6 cameras
  • Supports multi-link CXP-6 cameras (up to four CXP links)
  • Supports CXP speeds from 1.250 to 6.250 Gb/S
  • Supports simultaneous capture from four 6.250 Gb/S CXP links
  • Provides one CXP-6 uplink to the camera (bulk data uploads, zero latency triggers)
  • Low speed uplink also supported on all links
  • Uses DIN 1.0/2.3 connectors
  • Uses CXP standard 4+1 connector spacing
  • Provides power for all cameras (up to 13 Watts per link)
  • Provides Safe Power, full protection from all power line faults
  • Cameras are Plug and Play with automatic link speed detection
  • Cable lengths of up to 135 meters are supported
  • Cameras can be accurately synchronized, or can be completely independent
  • PCI Express x8 Gen 2.0 interface (also works in x16 slots)
  • Compatible with PCI Epress Gen 1.0 slots
  • Separate I/O for each camera
  • Highly deterministic, low latency frame grabber to camera trigger
  • Supports simultaneous serial communications to all cameras
  • Windows "sees" a separate frame grabber for each camera
  • FlowThru technology means no on-board memory is needed
  • Acquire variable length frames from line scan cameras
  • Acquire image sequences well beyond the 4GB barrier
  • No frame rate limit
  • Triggers and encoders for external control of acquisition
  • Programmable signal generator for camera control (independent for each camera)
  • Quadrature encoder support including sophisticated triggering schemes
  • Encoder divider/multiplier
  • Drivers, utilities and examples for Windows and Linux